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Home › Narrow width CMOS devices fabricated on strained lattice semiconductor substrates with maximized NMOS and PMOS drive currents

Narrow width CMOS devices fabricated on strained lattice semiconductor substrates with maximized NMOS and PMOS drive currents

US Patent 6764908 · Granted Jul 20, 2004

Estimated economic value: $1,607,000 ⓘ

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