Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Thermally-enhanced stacked-die ball grid array semiconductor package and method of fabricating the same

Thermally-enhanced stacked-die ball grid array semiconductor package and method of fabricating the same

US Patent 6716676 · Granted Apr 6, 2004

Estimated economic value: $880,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Display2015
Cavity-down ball grid array package with semiconductor chip solder ball2003
Thermally-enhanced stacked-die ball grid array semiconductor package and method 2002
Thermally-enhanced stacked-die ball grid array semiconductor package and method 2002
Thermally-enhanced stacked-die ball grid array semiconductor package and method 2002
Semiconductor package2002
Semiconductor package with a heat sink2002
Semiconductor package with a heat sink2002
Semiconductor package having lead frame with an exposed base pad2000