Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Prefetch management in cache memory

Prefetch management in cache memory

US Patent 6134633 · Granted Oct 17, 2000

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Processor branch cache with secondary branches2017
Instruction cache with way prediction2016
Compressed instruction format for use in a VLIW processor2013
Compressed instruction format for use in a VLIW processor2004
Method and apparatus for bus arbitration with weighted bandwidth allocation2002
Planar cache layout and instruction stream therefor2000
Computer system, cache memory and process for cache entry replacement with selec2000
Read crossbar elimination in a VLIW processor1999
Computer system including an interface for transferring data between two clock d1999
Compressed instruction format for use in a VLIW processor and processor for proc1999
Compiler generating swizzled instructions usable in a simplified cache layout1999
VLIW processor which processes compressed instruction format1998