Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method and apparatus for reducing cache snooping overhead in a multilevel cache system

Method and apparatus for reducing cache snooping overhead in a multilevel cache system

US Patent 5850534 · Granted Dec 15, 1998

Estimated economic value: $6,006,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Production shot design system2023
Production shot design system2022
Processor comprising a first and a second mode of operation and method of operat2011
Transparent return to parallel mode by rampoline instruction subsequent to inter2010
System architecture for high speed ray tracing2006
Exception handling with reduced overhead in a multithreaded multiprocessing syst2003
Method and mechanism for speculatively executing threads of instructions2003
System and method for transparent handling of extended register states2002
Transparent extended state save2001
Basic block oriented trace cache utilizing a basic block sequence buffer to indi2001
Processor programably configurable to execute enhanced variable byte length inst2000
Apparatus and method for reducing the cache miss penalty in a virtual addressed 1999