Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Etch back method to planarize an interlayer having a critical HDP-CVD deposition process

Etch back method to planarize an interlayer having a critical HDP-CVD deposition process

US Patent 5814564 · Granted Sep 29, 1998

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Damper groove with strain derivative amplifying pockets2022
Method of semiconductor integrated circuit fabrication2020
Damper groove with strain derivative amplifying pockets2019
Method of semiconductor integrated circuit fabrication2019
Method of semiconductor integrated circuit fabrication2018
Method of forming a semiconductor structure2018
Methods of forming gate dielectric material2018
System and method for controlling wafer and thin film surface temperature2017
Method and system for manufacturing semiconductor epitaxy structure2017
Apparatus and method for curvature and thin film stress measurement2017
Method and system for manufacturing semiconductor epitaxy structure2016
Semiconductor device having high-K gate dielectric layer2016