Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › High speed I.sub.DDQ monitor circuit

High speed I.sub.DDQ monitor circuit

US Patent 5694063 · Granted Dec 2, 1997

Estimated economic value: $1,462,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Methods and apparatus for estimating a position of a stuck-at defect in a scan c2012
System and method for device performance characterization in physical and logica2011
Dynamic mask memory for serial scan testing2011
Peak detector2010
Apparatus for locating a defect in a scan chain while testing digital logic2010
Single platform electronic tester2007
Dynamically reconfigurable precision signal delay test system for automatic test2006
Single platform electronic tester2006
System for dynamic re-allocation of test pattern data for parallel and serial te2006
Dynamically reconfigurable precision signal delay test system for automatic test2006
Dynamically reconfigurable precision signal delay test system for automatic test2005
Single platform electronic tester2004