Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Very high-density complex programmable logic devices with a multi-tiered hierarchical switch matrix and optimized flexible logic allocation

Very high-density complex programmable logic devices with a multi-tiered hierarchical switch matrix and optimized flexible logic allocation

US Patent 5521529 · Granted May 28, 1996

Estimated economic value: $7,738,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Dual power supplied memory cells and deterministic reset thereof for programmabl2025
Selectively powered embedded memory systems and methods2025
Adaptive power-on-reset generator systems and methods for programmable logic dev2024
Low-speed bus triggering methods and circuitry2021
Acoustic gesture recognition systems and methods2020
Low-speed bus time stamp methods and circuitry2019
Clock recovery and data recovery for programmable logic devices2019
Clock recovery and data recovery for programmable logic devices2018
Hardware accelerator test harness generation2017
Efficiently transmitting bulk data over a mobile network2017
Structured block transfer module, system architecture, and method for transferri2016
Structured block transfer module, system architecture, and method for transferri2016