Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Scheme for insuring data consistency between a plurality of cache memories and the main memory in a multi-processor system

Scheme for insuring data consistency between a plurality of cache memories and the main memory in a multi-processor system

US Patent 5222224 · Granted Jun 22, 1993

Estimated economic value: $11,038,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

High speed poucher2025
System and methods for generating secure ephemeral cloud-based computing resourc2024
High speed poucher2024
High speed poucher2023
Utterance request of items as seen within video2023
System and methods for securely storing data for efficient access by cloud-based2022
High speed poucher2022
High speed poucher2020
Utterance request of items as seen within video2020
Page stream segmentation2020
Low energy consumption mantissa multiplication for floating point multiply-add o2019
High speed poucher2018