Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Ring reduction logic using parallel determination of ring numbers in a plurality of functional units and forced ring numbers by instruction decoding

Ring reduction logic using parallel determination of ring numbers in a plurality of functional units and forced ring numbers by instruction decoding

US Patent 5117491 · Granted May 26, 1992

Estimated economic value: $11,549,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Control store addressing from multiple sources1993
Control store addressing from multiple sources1993
Recovery method and apparatus for a pipelined processing unit of a multiprocesso1993
Recovery method and apparatus for a pipelined processing unit of a multiprocesso1993
Apparatus for generating first and second selection signals for aligning words o1993
Apparatus for generating first and second selection signals for aligning words o1993
Method for reexecuting instruction by altering high bits of instruction address 1992
Bus interface interrupt apparatus1992
Least recently used replacement level generating apparatus and method1992
Apparatus and method for simultaneous execution of a write instruction and a suc1992
Apparatus and method for address translation of non-aligned double word virtual 1991
Mechanism for automatically updating multiple unit register file memories in suc1990