Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Fault isolation for multiphase clock signals supplied to dual modules which are checked by comparison using residue code generators

Fault isolation for multiphase clock signals supplied to dual modules which are checked by comparison using residue code generators

US Patent 5081629 · Granted Jan 14, 1992

Estimated economic value: $9,384,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

System and method for expanding the instruction set of an instruction processor2010
System and method for detecting and correcting errors in a control system2008
Dual microcode RAM address mode instruction execution using operation code RAM s2003
Testing and string instructions for data stored on memory byte boundaries in a w1999
Method of using a four-state simulator for testing integrated circuit designs ha1998
Method for generating an internet protocol suite checksum in a single macro inst1997
Method for checking hardware errors1992
Method for isolating failures of clear signals in instruction processors1991
Apparatus and method for checking start signals1991
Isolation for failures of input signals supplied to dual modules which are check1990
System for checking duplicate logic using complementary residue codes to achieve1990
Programmable data reformat system1986