Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Fast BCD/binary adder

Fast BCD/binary adder

US Patent 5007010 · Granted Apr 9, 1991

Estimated economic value: $3,708,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Multi-bus data processing system in which all data words in high level cache mem2001
IC chip using a phase-locked loop for providing signals having different timing 2000
Method and circuitry for modifying data words in a multi-level distributed data 1998
Low latency message processor interface using memory mapped Read/Write Windows1997
Pipelined microinstruction apparatus and methods with branch prediction and spec1997
IC chip using a common multiplexor logic element for performing logic operations1997
Enhanced fast multiplier1996
Methods and apparatus for providing a negative delay on an IC chip1996
Fast multiplier1994
Digital adder having a high-speed low-capacitance carry bypass signal path1992
High capacity multiple-disk storage method and apparatus having unusually high f1990
Data processing system employing a plurality of rapidly switchable pages for pro1989