Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Serial testing technique for embedded memories

Serial testing technique for embedded memories

US Patent 4969148 · Granted Nov 6, 1990

Estimated economic value: $29,333,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Read-only memory diagnosis and repair2025
Memory built-in self-test with automated reference trim feedback for memory sens2024
Method and apparatus for processing memory repair information2024
Reference bits test and repair using memory built-in self-test2024
Asynchronous interface for transporting test-related data via serial channels2023
Configurable built-in self-repair chain for fast repair data loading2022
Error-correcting code-assisted memory repair2022
Test generator for low power built-in self-test2014
Methods for at-speed testing of memory interface2013
Method and apparatus for storing and distributing memory repair information2010
Method for at-speed testing of memory interface using scan2009
Clocking methodology for at-speed testing of scan circuits with synchronous cloc2008