Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Stacked 2D CMOS with inter metal layers

Stacked 2D CMOS with inter metal layers

US Patent 12396254 · Granted Aug 19, 2025

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Staggered vertically spaced integrated circuit line metallization with different2025
Capacitor with dual dielectric layers2025
Subtractively patterned interconnect structures for integrated circuits2025
Subtractively patterned interconnect structures for integrated circuits2025
Differentially programmable magnetic tunnel junction device and system including2025
Three-dimensional nanoribbon-based hysteretic memory2025
Capacitor with an electrically conductive layer coupled with a metal layer of th2025
Thin film transistors having strain-inducing structures integrated with 2D chann2025
Thin film transistors having strain-inducing structures integrated with 2D chann2025
Thin film transistors having strain-inducing structures integrated with 2D chann2025
Thin film transistors having strain-inducing structures integrated with 2D chann2025
Thin film transistors having strain-inducing structures integrated with 2D chann2025