Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Circuit architecture using transistors with dynamic dual functionality for logic and embedded memory drivers

Circuit architecture using transistors with dynamic dual functionality for logic and embedded memory drivers

US Patent 12389609 · Granted Aug 12, 2025

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Direct backside self-aligned contact2025
Direct backside self-aligned contact2025
Support dielectric fin to prevent gate flop-over in nanosheet transistors2025
Support dielectric fin to prevent gate flop-over in nanosheet transistors2025
Stacked transistors having self aligned backside contact with backside replaceme2025
Stacked transistors having self aligned backside contact with backside replaceme2025
Self-aligned contact (SAC) in nanosheet transistors2025
Interconnect structure including patterned metal lines2025
Enhanced linerless vias2025
Liner-less via contact2025
Gate-all-around field-effect-transistor with wrap-around-channel inner spacer2025
Semiconductor device having hybrid middle of line contacts2025