Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method of forming a transistor device with a gate structure having a pair of recess regions and a resistive protection layer within

Method of forming a transistor device with a gate structure having a pair of recess regions and a resistive protection layer within

US Patent 12176407 · Granted Dec 24, 2024

Estimated economic value: $21,208,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Gap filling method in semiconductor manufacturing process2025
Semiconductor device2025
Integrated circuit packages and methods of forming the same2025
Fast common mode charging2025
FUSI gated device formation2025
High-voltage semiconductor devices and methods of formation2025
Polysilicon design for replacement gate technology2025
Method of manufacturing a semiconductor device2025
Method of manufacturing a semiconductor device2025
Semiconductor structure and method for forming the same2025
Semiconductor structure and forming method thereof2025
Recessed gate for an MV device2025