Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Calibration of a time-to-digital converter using a virtual phase-locked loop

Calibration of a time-to-digital converter using a virtual phase-locked loop

US Patent 11888493 · Granted Jan 30, 2024

Estimated economic value: $18,941,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Spur cancellation for spur measurement2025
Using time-to-digital converters to delay signals with high accuracy and large r2025
Measuring pin-to-pin delays between clock routes2025
Using time-to-digital converters to delay signals with high accuracy and large r2024
Spur cancellation for spur measurement2023
Measuring pin-to-pin delays between clock routes2023
Calibration of a time-to-digital converter using a virtual phase-locked loop2023
Calibration of a time-to-digital converter using a virtual phase-locked loop2023
Calibration of a time-to-digital converter using a virtual phase-locked loop2023
Calibration of a time-to-digital converter using a virtual phase-locked loop2023
Using time-to-digital converters to delay signals with high accuracy and large r2022
Correction for period error in a reference clock signal2022