Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Vertical semiconductor device with enhanced contact structure and associated methods

Vertical semiconductor device with enhanced contact structure and associated methods

US Patent 11664427 · Granted May 30, 2023

Estimated economic value: $1,904,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Semiconductor device including a superlattice and enriched silicon 28 epitaxial 2025
Current based water treatment process and system2025
Bipolar junction transistors including emitter-base and base-collector superlatt2025
Semiconductor device including a superlattice providing metal work function tuni2025
Radio frequency (RF) semiconductor devices including a ground plane layer having2025
Method for making DMOS devices including a superlattice and field plate for drif2025
Method for making semiconductor device including a superlattice and enriched sil2025
Method for making a radio frequency silicon-on-insulator (RFSOI) wafer including2025
Method for making a radio frequency silicon-on-insulator (RFSOI) wafer including2025
Method for making semiconductor device with selective etching of superlattice to2025
DRAM sense amplifier architecture with reduced power consumption and related met2025
Semiconductor device including superlattice with O18 enriched monolayers2025