{"@context": "https://schema.org", "@type": "BreadcrumbList", "itemListElement": [{"@type": "ListItem", "position": 1, "name": "Home", "item": "https://www.patentleaderboard.com/"}, {"@type": "ListItem", "position": 2, "name": "Method to repair edge placement errors in a semiconductor device", "item": "https://www.patentleaderboard.com/patent/11664274"}]}
Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Method to repair edge placement errors in a semiconductor device

Method to repair edge placement errors in a semiconductor device

US Patent 11664274 · Granted May 30, 2023

Estimated economic value: $16,378,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Epitaxial source/drain back-side device contact structures with wrap around meta2025
Epitaxial source/drain back-side device contact structures with wrap around meta2025
Gate aligned fin cut for advanced integrated circuit structure fabrication2025
Integrated circuit structures having dielectric anchor void2025
Angled gate or diffusion plugs2025
Topside plugs for epitaxial contact formation2025
Integrated circuit structure with recessed self-aligned deep boundary via2025
Integrated circuit structure with recessed self-aligned deep boundary via2025
Integrated circuit structures having maximized channel sizing2025
Integrated circuit structures having maximized channel sizing2025
Contact over active gate structures with uniform and conformal gate insulating c2025
Deep etch processing for transistors having varying pitch2025