Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Clock gating coupled memory retention circuit

Clock gating coupled memory retention circuit

US Patent 11003238 · Granted May 11, 2021

Estimated economic value: $985,869,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Leveraging low power states for fault testing of processing cores at runtime2024
Real-time hardware-assisted GPU tuning using machine learning2024
System level hardware mechanisms for dynamic assist control2024
System level hardware mechanisms for dynamic assist control2024
Core off sleep mode with low exit latency2024
Core off sleep mode with low exit latency2024
Core off sleep mode with low exit latency2024
Fault injection architecture for resilient GPU computing2023
Leveraging low power states for fault testing of processing cores at runtime2023
Real-time hardware-assisted GPU tuning using machine learning2022
Techniques for efficiently operating a processing system based on energy charact2022
Fault injection architecture for resilient GPU computing2022