Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Methods for reducing transfer pattern defects in a semiconductor device

Methods for reducing transfer pattern defects in a semiconductor device

US Patent 10777414 · Granted Sep 15, 2020

Estimated economic value: $35,161,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Dry develop process of photoresist2025
Deposition of semiconductor integration films2025
Vapor phase photoresists deposition2024
Vapor phase thermal etch solutions for metal oxo photoresists2024
Vapor phase thermal etch solutions for metal oxo photoresists2024
Deposition of semiconductor integration films2024
Self aligned multiple patterning2024
Fully self-aligned subtractive etch2024
Methods for controllable metal and barrier-liner recess2023
Vapor phase thermal etch solutions for metal oxo photoresists2023
Deposition of semiconductor integration films2023
Self-aligned contact and contact over active gate structures2022