Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Processor with approximate computing execution unit that includes an approximation control register having an approximation mode flag, an approximation amount, and an error threshold, where the approximation control register is writable by an instruction set instruction

Processor with approximate computing execution unit that includes an approximation control register having an approximation mode flag, an approximation amount, and an error threshold, where the approximation control register is writable by an instruction set instruction

US Patent 10235232 · Granted Mar 19, 2019

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Refreshing cache regions using a memory controller and multiple tables2025
Zero bits in L3 tags2024
Multi-component detection of gestures2024
Cache system with a primary cache and an overflow cache that use different index2023
Multi-component detection of gestures2022
Neural network unit that interrupts processing core upon condition2022
Neural network unit that interrupts processing core upon condition2022
Neural network unit that interrupts processing core upon condition2022
Neural network unit that interrupts processing core upon condition2022
Neural network unit that manages power consumption based on memory accesses per 2022
Processor with memory controller including dynamically programmable functional u2021
Processor with memory controller including dynamically programmable functional u2021