Issued Patents All Time
Showing 76–100 of 128 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7996827 | Method for the translation of programs for reconfigurable architectures | May Frank, Armin Nückel | 2011-08-09 |
| 7928763 | Multi-core processing system | — | 2011-04-19 |
| 7899962 | I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures | Robert Münch | 2011-03-01 |
| 7844796 | Data processing device and method | Alexander Thomas | 2010-11-30 |
| 7840842 | Method for debugging reconfigurable architectures | Frank May, Armin Nückel | 2010-11-23 |
| 7822968 | Circuit having a multidimensional structure of configurable cells that include multi-bit-wide inputs and outputs | Robert Münch | 2010-10-26 |
| 7822881 | Process for automatic dynamic reloading of data flow processors (DFPs) and units with two- or three-dimensional programmable cell architectures (FPGAs, DPGAs, and the like) | Robert Münch | 2010-10-26 |
| 7782087 | Reconfigurable sequencer structure | — | 2010-08-24 |
| 7657861 | Method and device for processing data | Frank May, Armin Nückel | 2010-02-02 |
| 7657877 | Method for processing data | Armin Nückel, Frank May, Markus Weinhardt, Joao Manuel Paiva Cardoso | 2010-02-02 |
| 7650448 | I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures | Robert Münch | 2010-01-19 |
| 7602214 | Reconfigurable sequencer structure | — | 2009-10-13 |
| 7595659 | Logic cell array and bus system | Frank May, Dirk Reichardt, Frank Lier, Gerd Ehlers, Armin Nückel +3 more | 2009-09-29 |
| 7584390 | Method and system for alternating between programs for execution by cells of an integrated circuit | Robert Münch | 2009-09-01 |
| 7581076 | Methods and devices for treating and/or processing data | — | 2009-08-25 |
| 7577822 | Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization | — | 2009-08-18 |
| 7565525 | Runtime configurable arithmetic and logic cell | Robert Münch | 2009-07-21 |
| 7480825 | Method for debugging reconfigurable architectures | — | 2009-01-20 |
| 7444531 | Methods and devices for treating and processing data | Volker Baumgarte | 2008-10-28 |
| 7434191 | Router | Daniel Bretz | 2008-10-07 |
| 7394284 | Reconfigurable sequencer structure | — | 2008-07-01 |
| 7337249 | I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures | Robert Münch | 2008-02-26 |
| 7266725 | Method for debugging reconfigurable architectures | Frank May, Armin Nückel | 2007-09-04 |
| 7243175 | I/O and memory bus system for DFPs and units with two-or multi-dimensional programmable cell architectures | Robert Münch | 2007-07-10 |
| 7237087 | Reconfigurable multidimensional array processor allowing runtime reconfiguration of selected individual array cells | Robert Münch | 2007-06-26 |