Issued Patents All Time
Showing 26–50 of 128 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9348587 | Providing code sections for matrix of arithmetic logic units in a processor | — | 2016-05-24 |
| 9327263 | Stepwise execution of exothermic reactions with participation of carbocations | Peter Pochlauer, Martina Kotthaus, Martin Deak, Thomas Zich, Rolf Marr | 2016-05-03 |
| 9274984 | Multi-processor with selectively interconnected memory units | — | 2016-03-01 |
| 9256575 | Data processor chip with flexible bus system | Frank May, Dirk Reichardt, Frank Lier, Gerd Ehlers, Armin Nückel +3 more | 2016-02-09 |
| 9250908 | Multi-processor bus and cache interconnection system | Volker Baumgarte, Frank May, Armin Nückel | 2016-02-02 |
| 9240220 | Stacked-die multi-processor | — | 2016-01-19 |
| 9170812 | Data processing system having integrated pipelined array data processor | Jürgen Becker, Markus Weinhardt, Volker Baumgarte, Frank May | 2015-10-27 |
| 9152427 | Instruction issue to array of arithmetic cells coupled to load/store cells with associated registers as extended register file | Frank May, Markus Weinhardt | 2015-10-06 |
| 9141390 | Method of processing data with an array of data processors according to application ID | Volker Baumgarte, Frank May, Armin Nückel | 2015-09-22 |
| 9092595 | Multiprocessor having associated RAM units | — | 2015-07-28 |
| 9086973 | System and method for a cache in a multi-core processor | — | 2015-07-21 |
| 9075605 | Methods and devices for treating and processing data | Volker Baumgarte | 2015-07-07 |
| 9047440 | Logical cell array and bus system | Frank May, Dirk Reichardt, Frank Lier, Gerd Ehlers, Armin Nückel +3 more | 2015-06-02 |
| 9043769 | Optimization of loops and data flow sections in multi-core processor environment | — | 2015-05-26 |
| 9037807 | Processor arrangement on a chip including data processing, memory, and interface elements | — | 2015-05-19 |
| 8914690 | Multi-core processor having disabled cores | Robert Münch | 2014-12-16 |
| 8914590 | Data processing method and device | Jürgen Becker, Markus Weinhardt, Volker Baumgarte, Frank May | 2014-12-16 |
| 8890215 | Reconfigurable elements | — | 2014-11-18 |
| RE45223 | Method of self-synchronization of configurable elements of a programmable module | Robert Münch | 2014-10-28 |
| 8869121 | Method for the translation of programs for reconfigurable architectures | Frank May, Armin Nückel | 2014-10-21 |
| RE45109 | Method of self-synchronization of configurable elements of a programmable module | Robert Münch | 2014-09-02 |
| 8819505 | Data processor having disabled cores | Robert Münch | 2014-08-26 |
| 8812820 | Data processing device and method | Alexander Thomas | 2014-08-19 |
| 8803552 | Reconfigurable sequencer structure | — | 2014-08-12 |
| 8726250 | Configurable logic integrated circuit having a multidimensional structure of configurable elements | Armin Nückel | 2014-05-13 |