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USPTO Patent Rankings Data through Dec 31, 2025
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William C. Van Loo — 32 Patents

Oracle: 31 patents #211 of 14,854Top 2%
IBM: 1 patents #44,878 of 70,183Top 65%
Poughkeepsie, NY: #123 of 1,613 inventorsTop 8%
New York: #3,705 of 115,490 inventorsTop 4%
Overall (All Time): #110,428 of 4,157,543Top 3%
32 Patents All Time
William C. Van Loo has been granted 32 US patents while listed as an inventor at Oracle. The first was granted in 1981 and the most recent in December 2003. William C. Van Loo ranks #110,428 of 4,157,543 US inventors in our database (top 2.7%). Patent records list William C. Van Loo in Poughkeepsie, NY, US.

Issued Patents All Time

Showing 1–25 of 32 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
6662306 Fast forwarding slave requests in a packet-switched computer system by transmitting request to slave in advance to avoid arbitration delay when system controller validates request 2003-12-09 $13,784,000
6597665 System for dynamic ordering support in a ringlet serial interconnect Satyanarayana Nishtala 2003-07-22 $13,538,000
6463472 System for maintaining strongly sequentially ordered packet flow in a ring network system with busy and failed nodes 2002-10-08 $11,018,000
6381664 System for multisized bus coupling in a packet-switched computer system Satyanarayana Nishtala, Zahir Ebrahim 2002-04-30 $54,125,000
6260174 Method and apparatus for fast-forwarding slave requests in a packet-switched computer system 2001-07-10 $129,770,000
6233615 System for maintaining strongly sequentially ordered packet flow in a ring network system with busy and failed nodes 2001-05-15 $117,620,000
6101565 System for multisized bus coupling in a packet-switched computer system Satyanarayana Nishtala, Zahir Ebrahim 2000-08-08 $197,461,000
6065052 System for maintaining strongly sequentially ordered packet flow in a ring network system with busy and failed nodes 2000-05-16 $125,663,000
6064672 System for dynamic ordering support in a ringlet serial interconnect Satyanarayana Nishtala 2000-05-16 $125,663,000
5987579 Method and apparatus for quickly initiating memory accesses in a multiprocessor cache coherent computer system Satyanarayana Nishtala, Zahir Ebrahim, Raymond Ng, Louis F. Coffin, III 1999-11-16 $57,694,000
5919265 Source synchronization data transfers without resynchronization penalty Satyanarayana Nishtala 1999-07-06 $81,373,000
5907485 Method and apparatus for flow control in packet-switched computer system Zahir Ebrahim, Satyanarayana Nishtala, Kevin Normoyle, Leslie D. Kohn, Louis F. Coffin, III 1999-05-25 $52,361,000
5905998 Transaction activation processor for controlling memory transaction processing in a packet switched cache coherent multiprocessor system Zahir Ebrahim, Satyanarayana Nishtala, Kevin Normoyle, Paul N. Loewenstein, Louis F. Coffin, III 1999-05-18 $67,248,000
5892957 Method and apparatus for interrupt communication in packet-switched microprocessor-based computer system Kevin Normoyle, Zahir Ebrahim, Satyanarayana Nishtala, Sun Den Chen, Charles E. Narad 1999-04-06 $28,349,000
5864677 System for preserving sequential ordering and supporting nonidempotent commands in a ring network with busy nodes 1999-01-26 $63,647,000
5862356 Pipelined distributed bus arbitration system Kevin Normoyle, Zahir Ebrahim, Satyanarayana Nishtala, Louis F. Coffin, III 1999-01-19 $44,924,000
5854906 Method and apparatus for fast-forwarding slave request in a packet-switched computer system 1998-12-29 $68,413,000
5852718 Method and apparatus for hybrid packet-switched and circuit-switched flow control in a computer system 1998-12-22 $46,178,000
5737755 System level mechanism for invalidating data stored in the external cache of a processor in a computer system Zahir Ebrahim, Satyanarayana Nishtala, Kevin Normoyle, Leslie D. Kohn, Louis F. Coffin, III 1998-04-07 $22,293,000
5710891 Pipelined distributed bus arbitration system Kevin Normoyle, Zahir Ebrahim, Satyanarayana Nishtala, Louis F. Coffin, III 1998-01-20 $56,930,000
5692197 Method and apparatus for reducing power consumption in a computer network without sacrificing performance Charles E. Narad, Zahir Ebrahim, Satyanarayana Nishtala, Kevin Normoyle, Louis F. Coffin, III +1 more 1997-11-25 $45,682,000
5689713 Method and apparatus for interrupt communication in a packet-switched computer system Kevin Normoyle, Zahir Ebrahim, Satyanarayana Nishtala, Sun Den Chen, Charles E. Narad 1997-11-18 $70,060,000
5684977 Writeback cancellation processing system for use in a packet switched cache coherent multiprocessor system Zahir Ebrahim, Satyanarayana Nishtala, Kevin Normoyle, Paul N. Loewenstein, Louis F. Coffin, III 1997-11-04 $47,461,000
5657472 Memory transaction execution system and method for multiprocessor system having independent parallel transaction queues associated with each processor Zahir Ebrahim, Satyanarayana Nishtala, Kevin Normoyle, Leslie D. Kohn, Louis F. Coffin, III +1 more 1997-08-12 $87,246,000
5655100 Transaction activation processor for controlling memory transaction execution in a packet switched cache coherent multiprocessor system Zahir Ebrahim, Satyanarayana Nishtala, Kevin Normoyle, Paul N. Loewenstein, Louis F. Coffin, III 1997-08-05 $46,736,000