Issued Patents All Time
Showing 26–37 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5737755 | System level mechanism for invalidating data stored in the external cache of a processor in a computer system | Zahir Ebrahim, William C. Van Loo, Kevin Normoyle, Leslie D. Kohn, Louis F. Coffin, III | 1998-04-07 |
| 5710891 | Pipelined distributed bus arbitration system | Kevin Normoyle, Zahir Ebrahim, William C. Van Loo, Louis F. Coffin, III | 1998-01-20 |
| 5706463 | Cache coherent computer system that minimizes invalidation and copyback operations | Zahir Ebrahim, William Loo, Kevin Normoyle, Leslie D. Kohn, Louis F. Coffin, III | 1998-01-06 |
| 5692197 | Method and apparatus for reducing power consumption in a computer network without sacrificing performance | Charles E. Narad, Zahir Ebrahim, William C. Van Loo, Kevin Normoyle, Louis F. Coffin, III +1 more | 1997-11-25 |
| 5689713 | Method and apparatus for interrupt communication in a packet-switched computer system | Kevin Normoyle, Zahir Ebrahim, William C. Van Loo, Sun Den Chen, Charles E. Narad | 1997-11-18 |
| 5684977 | Writeback cancellation processing system for use in a packet switched cache coherent multiprocessor system | William C. Van Loo, Zahir Ebrahim, Kevin Normoyle, Paul N. Loewenstein, Louis F. Coffin, III | 1997-11-04 |
| 5657472 | Memory transaction execution system and method for multiprocessor system having independent parallel transaction queues associated with each processor | William C. Van Loo, Zahir Ebrahim, Kevin Normoyle, Leslie D. Kohn, Louis F. Coffin, III +1 more | 1997-08-12 |
| 5655100 | Transaction activation processor for controlling memory transaction execution in a packet switched cache coherent multiprocessor system | Zahir Ebrahim, William C. Van Loo, Kevin Normoyle, Paul N. Loewenstein, Louis F. Coffin, III | 1997-08-05 |
| 5644753 | Fast, dual ported cache controller for data processors in a packet switched cache coherent multiprocessor system | Zahir Ebrahim, Kevin Normoyle, William C. Van Loo | 1997-07-01 |
| 5634068 | Packet switched cache coherent multiprocessor system | Zahir Ebrahim, William C. Van Loo, Kevin Normoyle, Leslie D. Kohn, Louis F. Coffin, III | 1997-05-27 |
| 5581729 | Parallelized coherent read and writeback transaction processing system for use in a packet switched cache coherent multiprocessor system | Zahir Ebrahim, William C. Van Loo, Paul N. Loewenstein, Sue-Kyoung Lee, Louis F. Coffin III | 1996-12-03 |
| 5181167 | Stacking heatpipe for three dimensional electronic packaging | Howard L. Davidson | 1993-01-19 |