| 6553435 |
DMA transfer method for a system including a single-chip processor with a processing core and a device interface in different clock domains |
Kevin Normoyle, Jaybharat Boddu, Jui-Cheng Su, Alex S. Han, Rajasekhar Cherabuddi +1 more |
2003-04-22 |
| 5987081 |
Method and apparatus for a testable high frequency synchronizer |
Kevin Normoyle, Prakash Narain |
1999-11-16 |
| 5884100 |
Low-latency, high-throughput, integrated cache coherent I/O system for a single-chip processor |
Kevin Normoyle, Jaybharat Boddu, Jui-Cheng Su, Alex S. Han, Rajasekhar Cherabuddi +1 more |
1999-03-16 |
| 5852608 |
Structure and method for bi-directional data transfer between asynchronous clock domains |
Kevin Normoyle |
1998-12-22 |
| 5802568 |
Simplified least-recently-used entry replacement in associative cache memories and translation lookaside buffers |
— |
1998-09-01 |
| 5506809 |
Predictive status flag generation in a first-in first-out (FIFO) memory device method and apparatus |
Yoshikazu Nishiura |
1996-04-09 |
