Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6553435 | DMA transfer method for a system including a single-chip processor with a processing core and a device interface in different clock domains | Kevin Normoyle, Michael A. Csoppenszky, Jaybharat Boddu, Alex S. Han, Rajasekhar Cherabuddi +1 more | 2003-04-22 |
| 5974511 | Cache subsystem with pseudo-packet switch | Jayabharat Boddu | 1999-10-26 |
| 5894587 | Multiple bus bridge system for maintaining a complete order by delaying servicing interrupts while posting write requests | Kevin Normoyle, David A. Penry | 1999-04-13 |
| 5884100 | Low-latency, high-throughput, integrated cache coherent I/O system for a single-chip processor | Kevin Normoyle, Michael A. Csoppenszky, Jaybharat Boddu, Alex S. Han, Rajasekhar Cherabuddi +1 more | 1999-03-16 |