Issued Patents All Time
Showing 51–54 of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6501328 | Method for reducing peak to peak jitter in a dual-loop delay locked loop | Claude Gauthier, Brian Amick, Tyler Thorp, Pradeep Trivedi | 2002-12-31 |
| 6495926 | 60 degree bump placement layout for an integrated circuit power grid | Sudhakar Bobba, Tyler Thorp | 2002-12-17 |
| 6493864 | Integrated circuit block model representation hierarchical handling of timing exceptions | — | 2002-12-10 |
| 6476663 | Method for reducing supply noise near an on-die thermal sensor | Claude Gauthier, Brian Amick, Tyler Thorp, Pradeep Trivedi | 2002-11-05 |