Issued Patents All Time
Showing 26–50 of 54 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6727737 | Delay locked loop design with diode for loop filter capacitance leakage current control | Pradeep Trivedi, Claude Gauthier | 2004-04-27 |
| 6704680 | Method for decoupling capacitor optimization for a temperature sensor design | Brian Amick, Claude Gauthier, Pradeep Trivedi | 2004-03-09 |
| 6691291 | Method and system for estimating jitter in a delay locked loop | Claude Gauthier, Brian Amick, Pradeep Trivedi | 2004-02-10 |
| 6686785 | Deskewing global clock skew using localized DLLs | Tyler Thorp, Pradeep Trivedi, Gin Yee, Claude Gauthier | 2004-02-03 |
| 6687881 | Method for optimizing loop bandwidth in delay locked loops | Claude Gauthier, Brian Amick, Pradeep Trivedi | 2004-02-03 |
| 6671863 | Optimization of loop bandwidth for a phase locked loop | Claude Gauthier, Brian Amick, Pradeep Trivedi | 2003-12-30 |
| 6664831 | Circuit for post-silicon control of delay locked loop charge pump current | Claude Gauthier, Brian Amick, Pradeep Trivedi | 2003-12-16 |
| 6664828 | Post-silicon control of phase locked loop charge pump current | Claude Gauthier, Brian Amick, Pradeep Trivedi | 2003-12-16 |
| 6662126 | Measuring skew using on-chip sampling | Gin Yee, Tyler Thorp, Pradeep Trivedi | 2003-12-09 |
| 6650157 | Using a push/pull buffer to improve delay locked loop performance | Brian Amick, Claude Gauthier | 2003-11-18 |
| 6639439 | Reducing voltage variation in a phase locked loop | Claude Gauthier, Pradeep Trivedi, Brian Amick | 2003-10-28 |
| 6618845 | Verifying on-chip decoupling capacitance | Tyler Thorp, Pradeep Trivedi | 2003-09-09 |
| 6617699 | 120 degree bump placement layout for an integrated circuit power grid | Sudhakar Bobba, Tyler Thorp | 2003-09-09 |
| 6618277 | Apparatus for reducing the supply noise near large clock drivers | Claude Gauthier, Brian Amick, Tyler Thorp, Pradeep Trivedi | 2003-09-09 |
| 6614287 | Calibration technique for delay locked loop leakage current | Claude Gauthier, Pradeep Trivedi, Brian Amick | 2003-09-02 |
| 6611573 | Non-integer division of frequency | Pradeep Trivedi, Tyler Thorp | 2003-08-26 |
| 6597218 | Programmable bias-generator for self-biasing a delay locked loop | Claude Gauthier, Brian Amick, Pradeep Trivedi | 2003-07-22 |
| 6597219 | Delay locked loop design with switch for loop filter capacitance leakage current control | Pradeep Trivedi, Claude Gauthier | 2003-07-22 |
| 6593784 | Post-silicon bias-generator control for a differential phase locked loop | Claude Gauthier, Brian Amick, Pradeep Trivedi | 2003-07-15 |
| 6573770 | Programmable leakage current offset for delay locked loop | Claude Gauthier, Pradeep Trivedi, Brian Amick | 2003-06-03 |
| 6570420 | Programmable current source adjustment of leakage current for delay locked loop | Pradeep Trivedi, Claude Gauthier | 2003-05-27 |
| 6566758 | Current crowding reduction technique for flip chip package technology | Pradeep Trivedi, Tyler Thorp, Sudhakar Bobba | 2003-05-20 |
| 6556041 | Reducing PECL voltage variation | Claude Gauthier, Pradeep Trivedi, Brian Amick | 2003-04-29 |
| 6541873 | 90 degree bump placement layout for an integrated circuit power grid | Sudhakar Bobba, Tyler Thorp | 2003-04-01 |
| 6515527 | Method for smoothing dI/dT noise due to clock transitions | Tyler Thorp, Brian Amick | 2003-02-04 |