Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8151089 | Array-type processor having plural processor elements controlled by a state control unit | Taro Fujii, Koichiro Furuta, Masato Motomura, Yoshikazu Yabe, Toru Awashima +2 more | 2012-04-03 |
| 7793092 | Information processing apparatus and method for using reconfigurable device | Takao Toi, Tooru Awashima, Hirokazu Kami, Takeshi Inuo, Nobuki Kajihara +3 more | 2010-09-07 |
| 7680962 | Stream processor and information processing apparatus | Katsumi Togawa, Ryoko Sasaki, Taro Fujii, Masato Motomura | 2010-03-16 |
| 7650484 | Array—type computer processor with reduced instruction storage | Takeshi Inuo, Nobuki Kajihara, Takao Toi, Tooru Awashima, Hirokazu Kami +3 more | 2010-01-19 |
| 7647485 | Data processing system for debugging utilizing halts in a parallel device | Hirokazu Kami, Takao Toi, Toru Awashima, Koichiro Furuta, Taro Fujii +1 more | 2010-01-12 |
| 7523292 | Array-type processor having state control units controlling a plurality of processor elements arranged in a matrix | Taro Fujii, Koichiro Furuta, Masato Motomura, Yoshikazu Yabe, Toru Awashima +2 more | 2009-04-21 |
| 7370123 | Information processing apparatus | Katsumi Togawa, Ryoko Sasaki | 2008-05-06 |
| 7337260 | Bus system and information processing system including bus system | Atsushi Okamura | 2008-02-26 |
| 7287146 | Array-type computer processor | Takeshi Inuo, Nobuki Kajihara, Takao Toi, Tooru Awashima, Hirokazu Kami +3 more | 2007-10-23 |
| 7167937 | Bus system | Atsushi Okamura | 2007-01-23 |
| 7076719 | Bus system and retry method | Atsushi Okamura | 2006-07-11 |
| 6433408 | Highly integrated circuit including transmission lines which have excellent characteristics | Masayuki Mizuno | 2002-08-13 |
| 6378080 | Clock distribution circuit | Masayuki Mizuno | 2002-04-23 |