Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8575954 | Structures and processes for fabrication of probe card assemblies with multi-layer interconnect | Fu Chiung Chong, William R. Bottoms, Erh-Kong Chieh | 2013-11-05 |
| 5384710 | Circuit level netlist generation | Amrit K. Lalchandani | 1995-01-24 |
| 5229662 | Logic circuit capable of operating with any one of a plurality of alternative voltage supply levels | Mau Truong, Loren Yee | 1993-07-20 |
| 5084824 | Simulation model generation from a physical data base of a combinatorial circuit | Amrit K. Lalchandani | 1992-01-28 |
| 5029280 | ECL circuit for resistance and temperature bus drop compensation | Loren Yee | 1991-07-02 |
| 4695749 | Emitter-coupled logic multiplexer | — | 1987-09-22 |
| 4686394 | ECL circuit with current-splitting network | — | 1987-08-11 |
| 4686674 | Multiplexer with inhibit for ECL gate array | — | 1987-08-11 |