Issued Patents All Time
Showing 26–45 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6836833 | Apparatus and method for discovering a scratch pad memory configuration | Ryan C. Kinter, Scott M. McCoy | 2004-12-28 |
| 6065078 | Multi-processor element provided with hardware for software debugging | Ohad Falik, Ophir Shabtay, Tzvia Weisman | 2000-05-16 |
| 5915266 | Processor core which provides a linear extension of an addressable memory space | Ohad Falik | 1999-06-22 |
| 5872960 | Integrated circuit having CPU core operable for switching between two independent asynchronous clock sources of different frequencies while the CPU continues executing instructions | Oved Oz, Yachin Afek | 1999-02-16 |
| 5822779 | Microprocessor-based data processing apparatus that commences a next overlapping cycle when a ready signal is detected not to be active | Ohad Falik, Aharon Ostrer, Yair Baydatch, Alberto Sandbank | 1998-10-13 |
| 5684948 | Memory management circuit which provides simulated privilege levels | James Scott Johnson, Tim Short | 1997-11-04 |
| 5649208 | Mechanism for handling non-maskable interrupt requests received from different sources | Oved Oz, Meir Tsadik | 1997-07-15 |
| 5638306 | Testing hooks for testing an integrated data processing system | Oved Oz, Alberto Sandbank | 1997-06-10 |
| 5630153 | Integrated digital signal processor/general purpose CPU with shared internal memory | Amos Intrater, Moshe Doron, Lev Epstein, Maurice Valentaten, Israel Greiss | 1997-05-13 |
| 5613149 | Integrated data processing system utilizing successive approximation analog to digital conversion and PWM for parallel disconnect | Yachin Afek, Oved Oz | 1997-03-18 |
| 5606714 | Integrated data processing system including CPU core and parallel, independently operating DSP module and having multiple operating modes | Moshe Doron, Lev Epstein | 1997-02-25 |
| 5603017 | Parallel integrated circuit having DSP module and CPU core operable for switching between two independent asynchronous clock sources while the system continues executing instructions | Oved Oz, Yachin Afek | 1997-02-11 |
| 5600821 | Distributed directory for information stored on audio quality memory devices | Ohad Falik, Zeev Collin | 1997-02-04 |
| 5596764 | Debug mechanism for parallel-operating DSP module and CPU core | Lior Katzri, Omri Viner, Raya Levitan, Yehezkel Tzadik | 1997-01-21 |
| 5592677 | Integrated data processing system including CPU core and parallel, independently operating DSP module | Amos Intrater, Andy Birenbaum, Iddo Carmon, Ilan Shimony, Itael Fraenkel +14 more | 1997-01-07 |
| 5590357 | Integrated CPU core and parallel, independently operating DSP module and time-critical core priority scheme | Amos Intrater, Andy Birenbaum, Iddo Carmon, Ilan Shimony, Itael Fraenkel +14 more | 1996-12-31 |
| 5566308 | Processor core which provides a linear extension of an addressable memory space | Chaim Bendelac, Dan Biran, Ohad Falik, Gadi Erlich, Jonathan Levy | 1996-10-15 |
| 5491828 | Integrated data processing system having CPU core and parallel independently operating DSP module utilizing successive approximation analog to digital and PWM for parallel disconnect | Oved Oz, Yachin Afek | 1996-02-13 |
| 5446909 | Binary multiplication implemented by existing hardware with minor modifications to sequentially designate bits of the operand | Ohad Falik, Aharon Ostrer, Yair Baydatch, Gadi Erlich | 1995-08-29 |
| 5249286 | Selectively locking memory locations within a microprocessor's on-chip cache | Donald B. Alpert, Oved Oz, Reuven Marko, Alon Shacham | 1993-09-28 |