Issued Patents All Time
Showing 1–25 of 49 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6639286 | Method and apparatus for reducing process-induced charge buildup | — | 2003-10-28 |
| 6445049 | Cell based array comprising logic, transfer and drive cells | — | 2002-09-03 |
| 6432726 | Method and apparatus for reducing process-induced charge buildup | — | 2002-08-13 |
| 6177691 | Cell based array having compute drive ratios of N:1 | Puneet Sawhney | 2001-01-23 |
| 6177709 | Cell based array having compute/drive ratios of N:1 | — | 2001-01-23 |
| 5850101 | Bipolar transistor with extended emitter | — | 1998-12-15 |
| 5733791 | Methods for fabrication of bipolar device having high ratio of emitter to base area | — | 1998-03-31 |
| 5682058 | Multilayer antifuse with low leakage and method of manufacture therefor | — | 1997-10-28 |
| 5675175 | Bipolar transistors | — | 1997-10-07 |
| 5663591 | Antifuse with double via, spacer-defined contact | — | 1997-09-02 |
| 5661046 | Method of fabricating BiCMOS device | Vida Ilderem, Alan Glen Solheim, Christopher S. Blair, Rick C. Jerome, Rajeeva Lahri +1 more | 1997-08-26 |
| 5627098 | Method of forming an antifuse in an integrated circuit | — | 1997-05-06 |
| 5589412 | Method of making increased-density flash EPROM that utilizes a series of planarized, self-aligned, intermediate strips of conductive material to contact the drain regions | John M. Pierce, Albert Bergemont | 1996-12-31 |
| 5587613 | Low-capacitance, isotropically etched antifuse and method of manufacture therefor | — | 1996-12-24 |
| 5572062 | Antifuse with silicon spacers | — | 1996-11-05 |
| 5572063 | Bipolar transistor with L-shaped emitter | — | 1996-11-05 |
| 5521440 | Low-capacitance, plugged antifuse and method of manufacture therefor | — | 1996-05-28 |
| 5514900 | Mutlilayered antifuse with intermediate metal layer | — | 1996-05-07 |
| 5512508 | Method and apparatus for improvement of interconnection capacitance | — | 1996-04-30 |
| 5510629 | Multilayer antifuse with intermediate spacer layer | Yakov Karpovich | 1996-04-23 |
| 5508552 | Transistors with multiple emitters, and transistors with substantially square base emitter junctions | David E. Bien, Michael J. Grubisich | 1996-04-16 |
| 5440167 | Antifuse with double via contact and method of manufacture therefor | — | 1995-08-08 |
| 5436496 | Vertical fuse device | Rick C. Jerome, Ronald P. Kovacs, George E. Ganschow, Lawrence K. Lam, James L. Bouknight +2 more | 1995-07-25 |
| 5399509 | Method of manufacturing a bipolar transistor | — | 1995-03-21 |
| 5389553 | Methods for fabrication of transistors | Michael J. Grubisich | 1995-02-14 |