Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11257845 | Radio frequency integrated circuit having relatively small circuit area and method of fabricating the same | Yu-An Huang | 2022-02-22 |
| 9653552 | Body-tied, strained-channel multi-gate device and methods | Hong-Nien Lin, Tiao-Yuan Huang | 2017-05-16 |
| 9406800 | Body-tied, strained-channel multi-gate device and methods of manufacturing same | Hong-Nien Lin, Tiao-Yuan Huang | 2016-08-02 |
| 9214554 | Body-tied, strained-channel multi-gate device and methods of manufacturing same | Hong-Nien Lin, Tiao-Yuan Huang | 2015-12-15 |
| 8946811 | Body-tied, strained-channel multi-gate device and methods of manufacturing same | Hong-Nien Lin, Tiao-Yuan Huang | 2015-02-03 |
| 8932916 | Method for fabricating thin-film transistor | Rong-Jhe Lyu | 2015-01-13 |
| 7977755 | Suspended nanochannel transistor structure and method for fabricating the same | Chun-Jung Su, Hsing-Hui Hsu, Guan-Jang Li | 2011-07-12 |
| 7972912 | Method of fabricating semiconductor device | Huai-Yuan Tseng, Chen-Pang Kung, Ming-Hsien Lee | 2011-07-05 |
| 7723789 | Nonvolatile memory device with nanowire channel and method for fabricating the same | Chun-Jung Su, Hsin-Hwei Hsu | 2010-05-25 |
| 7504694 | Structure of semiconductor device | Huai-Yuan Tseng, Chen-Pang Kung, Ming-Hsien Lee | 2009-03-17 |
| 6667508 | Nonvolatile memory having a split gate | Tiao-Yuan Huang | 2003-12-23 |
| 6555424 | Thin film transistor with sub-gates and schottky source/drain and a manufacturing method of the same | Ming-Shih Tsai, Tiao-Yuan Huang | 2003-04-29 |
| 6495432 | Method of improving a dual gate CMOS transistor to resist the boron-penetrating effect | Chi-Chun Chen, Chun-Yen Chang, Tiao-Yuan Huang | 2002-12-17 |
| 6432786 | Method of forming a gate oxide layer with an improved ability to resist the process damage | Chi-Chun Chen, Chun-Yen Chang, Tiao-Yuan Huang | 2002-08-13 |
| 6232206 | Method for forming electrostatic discharge (ESD) protection transistors | Tiao-Yuan Huang | 2001-05-15 |
| 5998246 | Self-aligned manufacturing method of a thin film transistor for forming a single-crystal bottom-gate and an offset drain | Tiao-Yuan Huang | 1999-12-07 |
| 5913123 | Manufacturing method for deep-submicron P-type metal-oxide semiconductor shallow junction | Jien-Sheng Chao, Liang-Po Chen | 1999-06-15 |
| 5827768 | Method for manufacturing an MOS transistor having a self-aligned and planarized raised source/drain structure | Tiao-Yuan Huang | 1998-10-27 |
| 5783479 | Structure and method for manufacturing improved FETs having T-shaped gates | Tiao-Yuan Huang | 1998-07-21 |
| 5714398 | Self-aligned tungsten strapped source/drain and gate technology for deep submicron CMOS | Tien-Sheng Chao | 1998-02-03 |
| 5658806 | Method for fabricating thin-film transistor with bottom-gate or dual-gate configuration | Liang-Po Chen, Hsiao-Yi Lin, Chun-Yen Chang | 1997-08-19 |