TT

Tzu-Ching Tsai

NT Nanya Technology: 46 patents #10 of 775Top 2%
Hon Hai Precision Ind. Co.: 14 patents #179 of 1,805Top 10%
Microsoft: 4 patents #10,696 of 40,388Top 30%
CC Concraft Holding Co.: 3 patents #9 of 19Top 50%
Overall (All Time): #29,922 of 4,157,543Top 1%
69
Patents All Time

Issued Patents All Time

Showing 51–69 of 69 patents

Patent #TitleCo-InventorsDate
6838866 Process for measuring depth of source and drain Hui-Min Mao 2005-01-04
6831016 Method to prevent electrical shorts between adjacent metal lines Ping Hsu 2004-12-14
6815356 Method for forming bottle trench Hsin-Jung Ho, Yi-Nan Chen 2004-11-09
6815307 Method for fabricating a deep trench capacitor Ping Hsu 2004-11-09
6800535 Method for forming bottle-shaped trenches Yi-Nan Chen, Hsin-Jung Ho 2004-10-05
6790740 Process for filling polysilicon seam Tse-Yao Huang, Yi-Nan Chen 2004-09-14
6767800 Process for integrating alignment mark and trench device Liang-Hsin Chen 2004-07-27
6750147 Process for integration of a trench for capacitors and removal of black silicon Frasier Wang 2004-06-15
6709975 Method of forming inter-metal dielectric Hui-Min Mao, Yi-Nan Chen 2004-03-23
6706587 Method for forming buried plates Hui-Min Mao, Ying Huan Chuang 2004-03-16
6703311 Method for estimating capacitance of deep trench capacitors Hui-Min Mao, Ying Huan Chuang, Yu-Pi Lee 2004-03-09
6696344 Method for forming a bottle-shaped trench Shian-Jyh Lin, Hsin-Jung Ho, Chao-Sung Lai 2004-02-24
6610567 DRAM having a guard ring and process of fabricating the same I-Sheng Liu 2003-08-26
6541347 Method of providing planarity of a photoresist Han-Chih Lin, Hui-Min Mao 2003-04-01
6407421 DRAM having a guard ring and process of fabricating the same Sheng-Ming Liu 2002-06-18
6383936 Method for removing black silicon in semiconductor fabrication Hung-Hsin Lin 2002-05-07
6303491 Method for fabricating self-aligned contact hole Lin-Chin Su, Jengping Lin, Tse-Yao Huang 2001-10-16
6225186 Method for fabricating LOCOS isolation Lin-Chin Su, Minn-Jiunn Jiang 2001-05-01
6153482 Method for fabricating LOCOS isolation having a planar surface which includes having the polish stop layer at a lower level than the LOCOS formation Lin-Chin Su, Miin-Jiunn Jiang, Hung-Chang Liao, Jim Wang, Chung-Min Lin 2000-11-28