Issued Patents All Time
Showing 25 most recent of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11869255 | Anti-counterfeiting face detection method, device and multi-lens camera | Xing Su, Jiajun Shen, Shiliang Pu | 2024-01-09 |
| 11209268 | Depth measuring method and system | Jingxiong WANG, Shiliang Pu | 2021-12-28 |
| 11158089 | Camera parameter calibration method, device, apparatus, and system | Kui Zhang, Xunlong Xia | 2021-10-26 |
| 11107277 | Method and device for constructing 3D scene model | Kui Zhang, Jie Li, Yangqin LI, Chao Wang, Shiliang Pu | 2021-08-31 |
| 10755381 | Method and device for image stitching | Cheng Qin, Linjie Shen, Hai Yu, Shiliang Pu | 2020-08-25 |
| 10713804 | Method for obtaining combined depth image, and depth camera | Jingxiong WANG, Linjie Shen, Hai Yu, Shiliang Pu | 2020-07-14 |
| 10447989 | Method and device for synthesizing depth images | Shiliang Pu, Jingxiong WANG, Linjie Shen, Hai Yu | 2019-10-15 |
| 7723181 | Overlay alignment mark and alignment method for the fabrication of trench-capacitor dram devices | An-Hsiung Liu, Chiang-Lin Shih, Wen-Bin Wu, Lin-Chin Su, Pei-Ing Lee | 2010-05-25 |
| 7678692 | Fabrication method for a damascene bit line contact plug | Yi-Nan Chen, Jeng-Ping Lin, Chih-Ching Lin | 2010-03-16 |
| 7419882 | Alignment mark and alignment method for the fabrication of trench-capacitor dram devices | Yuan-Hsun Wu, An-Hsiung Liu, Chiang-Lin Shih, Pei-Ing Lee, Lin-Chin Su | 2008-09-02 |
| 7285377 | Fabrication method for a damascene bit line contact plug | Yi-Nan Chen, Jeng-Ping Lin, Chih-Ching Lin | 2007-10-23 |
| 7211483 | Memory device with vertical transistors and deep trench capacitors and method of fabricating the same | Yi-Nan Chen, Chih-Yuan Hsiao, Ming-Cheng Chang | 2007-05-01 |
| 7195975 | Method of forming bit line contact via | Tzu-Ching Tsai, Yi-Nan Chen | 2007-03-27 |
| 7135783 | Contact etching utilizing partially recessed hard mask | Wen-Kuei Hsieh, Yi-Nan Chen | 2006-11-14 |
| 7105453 | Method for forming contact holes | Yi-Nan Chen, Tse-Yao Huang | 2006-09-12 |
| 7064044 | Contact etching utilizing multi-layer hard mask | Yi-Nan Chen | 2006-06-20 |
| 7009236 | Memory device with vertical transistors and deep trench capacitors and method of fabricating the same | Yi-Nan Chen, Chih-Yuan Hsiao, Ming-Cheng Chang | 2006-03-07 |
| 6987322 | Contact etching utilizing multi-layer hard mask | Yi-Nan Chen | 2006-01-17 |
| 6987053 | Method of evaluating reticle pattern overlay registration | Wen-Bin Wu, Chih-Yuan Hsiao | 2006-01-17 |
| 6977134 | Manufacturing method of a MOSFET gate | Chung-Peng Hao, Yi-Nan Chen, Tzu-Ching Tsai | 2005-12-20 |
| 6960525 | Method of forming metal plug | Yi-Nan Chen | 2005-11-01 |
| 6909136 | Trench-capacitor DRAM cell having a folded gate conductor | Yinan Chen, Ming-Cheng Chang, Jeng-Ping Lin, Tse-Yao Huang, Change-Rong Wu | 2005-06-21 |
| 6838866 | Process for measuring depth of source and drain | Tzu-Ching Tsai | 2005-01-04 |
| 6833081 | Method of metal etching post cleaning | Yi-Nan Chen, Shih-Chieh Kao, Tien-Sung Chen | 2004-12-21 |
| 6790735 | Method of forming source/drain regions in semiconductor devices | Sheng-Tsung Chen, Yi-Nan Chen, Bo Ching Jiang, Chih-Yuan Hsiao | 2004-09-14 |