Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12136649 | Deep trench isolation structures with a substrate connection | Jianbo Zhou, Shiang Yang Ong, Namchil Mun, Zhongxiu Yang | 2024-11-05 |
| 9070740 | Memory unit, memory unit array and method of manufacturing the same | Tzung-Han Lee, Yaw Wen Hu, Chung-Yuan Lee, Hsu Chiang, Sheng-Hsiung Wu | 2015-06-30 |
| 9070782 | Semiconductor structure | Tzung-Han Lee, Yaw Wen Hu, Chung-Yuan Lee, Hsu Chiang, Sheng-Hsiung Wu | 2015-06-30 |
| 9035366 | Semiconductor device and manufacturing method therefor | Tzung-Han Lee, Yaw Wen Hu, Chung-Yuan Lee, Hsu Chiang, Sheng-Hsiung Wu | 2015-05-19 |
| 8466504 | DRAM with dopant stop layer and method of fabricating the same | Chia-Ming Yang, Yao Wang, Chen-Kang Wei, Chien-Chi Lee, Ming Yean +4 more | 2013-06-18 |
| 8044449 | Memory device with a length-controllable channel | Shian-Jyh Lin, Meng-Hung Chen, Chung-Yuan Lee, Pei-Ing Lee | 2011-10-25 |
| 7985998 | Trench-type semiconductor device structure | Shian-Jyh Lin, Ming-Cheng Chang, Neng-Tai Shih | 2011-07-26 |
| 6960530 | Method of reducing the aspect ratio of a trench | Chang-Rong Wu, Yi-Nan Chen, Kuo-Chien Wu | 2005-11-01 |
| 6153482 | Method for fabricating LOCOS isolation having a planar surface which includes having the polish stop layer at a lower level than the LOCOS formation | Lin-Chin Su, Tzu-Ching Tsai, Miin-Jiunn Jiang, Jim Wang, Chung-Min Lin | 2000-11-28 |