Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7428653 | Method and system for execution and latching of data in alternate threads | Keith M. Bindloss, Ching Long Su, Marty T. Budrovic, Rajiv Gupta | 2008-09-23 |
| 7302619 | Error correction in a cache memory | Joseph B. Tompkins | 2007-11-27 |
| 6741517 | Four port RAM cell | Rajiv Gupta | 2004-05-25 |
| 5761690 | Address generation apparatus and method using a peripheral address generation unit and fast interrupts | Tan Nhat Dao | 1998-06-02 |
| 5659695 | Method and apparatus utilizing simultaneous memory reads for increasing memory access bandwidth in a digital signal processor | Brian T. Kelley, Tan Nhat Dao | 1997-08-19 |
| 5646946 | Apparatus and method for selectively companding data on a slot-by-slot basis | John Vandermeer, Tan Nhat Dao | 1997-07-08 |
| 4917759 | Method for forming self-aligned vias in multi-level metal integrated circuits | Jeffrey L. Klein | 1990-04-17 |