CW

Chih-Hsien Wang

MV Mosel Vitelic: 12 patents #13 of 482Top 3%
DE Delta Electronics: 11 patents #134 of 2,746Top 5%
CA Chroma Ate: 5 patents #10 of 219Top 5%
RT Richtek Technology: 5 patents #94 of 459Top 25%
BI Brilliance Semiconductor Intl.: 2 patents #1 of 9Top 15%
EC Eternal Materials Co.: 1 patents #25 of 90Top 30%
Overall (All Time): #84,451 of 4,157,543Top 3%
38
Patents All Time

Issued Patents All Time

Showing 26–38 of 38 patents

Patent #TitleCo-InventorsDate
6788107 Variable voltage tolerant input/output circuit 2004-09-07
6100561 Method for forming LDD CMOS using double spacers and large-tilt-angle ion implantation Min-Liang Chen 2000-08-08
6020231 Method for forming LDD CMOS Min-Liang Chen 2000-02-01
5972746 Method for manufacturing semiconductor devices using double-charged implantation Min-Liang Chen, San-Jung Chang, Saysamone Pittikoun 1999-10-26
5930631 Method of making double-poly MONOS flash EEPROM cell Min-Liang Chen, Thomas Chang 1999-07-27
5926712 Process for fabricating MOS device having short channel Min-Liang Chen, Chih-Hsun Chu, San-Jung Chang 1999-07-20
5827747 Method for forming LDD CMOS using double spacers and large-tilt-angle ion implantation Min-Liang Chen 1998-10-27
5804493 Method for preventing substrate damage during semiconductor fabrication Minn-Horng Juang, Cheng-Tsung Ni 1998-09-08
5789297 Method of making EEPROM cell device with polyspacer floating gate Min-Liang Chen, Thomas Chang 1998-08-04
5703388 Double-poly monos flash EEPROM cell Min-Liang Chen, Thomas Chang 1997-12-30
5686324 Process for forming LDD CMOS using large-tilt-angle ion implantation Min-Liang Chen 1997-11-11
5606191 Semiconductor device with lightly doped drain regions 1997-02-25
5516711 Method for forming LDD CMOS with oblique implantation 1996-05-14