Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9405873 | Method for improved accuracy of a substrate parasitic-resistance extraction in a circuit simulation | Hisato Inaba | 2016-08-02 |
| 7979817 | Net list producing device producing a net list with an interconnection parasitic element by hierarchical processing | Mitsutoshi Shirota, Michiko Uchimura | 2011-07-12 |
| 7432581 | Semiconductor device, method of manufacture thereof and semiconductor integrated circuit | Masumi Yoshida, Tetsuya Watanabe, Takashi Ippoushi | 2008-10-07 |
| 7398506 | Net list producing device producing a net list with an interconnection parasitic element by hierarchical processing | Mitsutoshi Shirota, Michiko Uchimura | 2008-07-08 |
| 7230435 | Capacitance measurement circuit | Tatsuya Kunikiyo, Tetsuya Watanabe, Kyoji Yamashita | 2007-06-12 |
| 6982555 | Semiconductor device | Kyoji Yamashita, Tatsuya Kunikiyo, Tetsuya Watanabe | 2006-01-03 |
| 6728943 | Semiconductor circuit extraction apparatus and method | — | 2004-04-27 |
| 6504186 | Semiconductor device having a library of standard cells and method of designing the same | Yoshihide Ajioka, Yukihiko Shimazu, Hideyuki HAMADA | 2003-01-07 |
| 6442740 | Clock signal analysis device and clock signal analysis method | Yasunori Shibayama | 2002-08-27 |