Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7515639 | Asynchronous data transmitting apparatus | — | 2009-04-07 |
| 7376190 | Asynchronous data transmitting apparatus | — | 2008-05-20 |
| 5574391 | ECL integrated circuit allowing fast operation | Yasushi Hayakawa, Masahiro Ueda | 1996-11-12 |
| 5561382 | Bi-CMOS output buffer circuit for CMOS-to-ECL conversion | Masahiro Ueda | 1996-10-01 |
| 5485026 | Semiconductor integrated circuit device having improved integration and design flexibility | — | 1996-01-16 |
| 5317206 | Buffer circuit using capacitors to control the slow rate of a driver transistor | Masahiro Ueda | 1994-05-31 |
| 5293457 | Neural network integrated circuit device having self-organizing function | Yutaka Arima, Ichiro Tomioka | 1994-03-08 |
| 5173625 | Method and apparatus for conversion of signal level from ECL to TTL | Masahiro Ueda, Katsushi Asahina | 1992-12-22 |
| 5164617 | High speed BiCMOS logic circuit | Masahiro Ueda | 1992-11-17 |
| 5148514 | Neural network integrated circuit device having self-organizing function | Yutaka Arima, Ichiro Tomioka | 1992-09-15 |
| 5072285 | Semiconductor integrated circuit having region for forming complementary field effect transistors and region for forming bipolar transistors | Masahiro Ueda, Kimio Ueda | 1991-12-10 |
| 4992845 | Semiconductor integrated circuit device having input/output buffer cells each comprising a plurality of transistor regions arranged in a single line | Takahiko Arakawa, Kazuhiro Sakashita, Satoru Kishida, Ichiro Tomioka, Masahiro Ueda +1 more | 1991-02-12 |
| 4916385 | Inverter circuit | Ichiro Tomioka, Masahiro Ueda, Takahiko Arakawa, Yoshihiro Okuno | 1990-04-10 |
| 4870345 | Semiconductor intergrated circuit device | Ichiro Tomioka, Kazuhiro Sakashita, Satoru Kishida, Takahiko Arakawa | 1989-09-26 |
| 4856002 | Semiconductor integrated circuit apparatus | Kazuhiro Sakashita, Satoru Kishida, Ichiro Tomioka, Takahiko Arakawa | 1989-08-08 |
| 4825439 | Semiconductor logic integrated circuit device having first and second operation modes for testing | Kazuhior Sakashita, Satoru Kishida | 1989-04-25 |
| 4780666 | Semiconductor integrated circuit device having rest function | Kazuhiro Sakashita, Satoru Kishida, Ichiro Tomioka, Takahiko Arakawa | 1988-10-25 |