Issued Patents All Time
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10336380 | Rocker bogie | Yusuke Morita, Toshiki Masuda, Yusuke Kobayashi | 2019-07-02 |
| 8300155 | Broadcast receiving device and program selecting method | Yasushi Onishi, Kazuhiro Shimakawa | 2012-10-30 |
| 6032246 | Bit-slice processing unit having M CPU's reading an N-bit width data element stored bit-sliced across M memories | — | 2000-02-29 |
| 5911039 | Integrated circuit device comprising a plurality of functional modules each performing predetermined function | Takeshi Hashizume | 1999-06-08 |
| 5889422 | Semiconductor integrated circuit | Tatsunori Komoike | 1999-03-30 |
| 5703513 | Master-slave bistable latch with clock input control | Takeshi Hashizume | 1997-12-30 |
| 5633806 | Semiconductor integrated circuit and method of designing same | Terukazu Yusa, Isao Takimoto, Takeshi Hashizume, Tatsunori Komoike | 1997-05-27 |
| 5621694 | Semiconductor integrated device with an improved performance | Mamoru Sakugawa, Takeshi Hashizume | 1997-04-15 |
| 5493506 | Integrated circuit device and method of designing same | Isao Takimoto, Terukazu Yusa, Takeshi Hashizume, Tatsunori Komoike | 1996-02-20 |
| 5384275 | Method of manufacturing a semiconductor integrated circuit device, and an electronic circuit device | — | 1995-01-24 |
| 5319224 | Integrated circuit device having a geometry to enhance fabrication and testing and manufacturing method thereof | Shuichi Kato, Isao Takimoto | 1994-06-07 |
| 5315182 | Semiconductor integrated circuit having annular power supply with plural lines | Terukazu Yusa, Isao Takimoto, Takeshi Hashizume, Tatsunori Komoike | 1994-05-24 |
| 5260949 | Scan path system and an integrated circuit device using the same | Takeshi Hashizume | 1993-11-09 |
| 5150044 | Semiconductor integrated circuit device comprising scan paths having individual controllable bypasses | Takeshi Hashizume | 1992-09-22 |
| 5142490 | Multiplication circuit with storing means | Yoshiki Tsujihashi | 1992-08-25 |
| 5130647 | Scan test circuit and semiconductor integrated circuit device using the same | Takeshi Hashizume | 1992-07-14 |
| 5109190 | Semiconductor apparatus including semiconductor integrated circuit and operating method thereof | Takeshi Hashizume | 1992-04-28 |
| 5060183 | Parallel multiplier circuit using matrices, including half and full adders | Yoshiki Tsujihashi | 1991-10-22 |
| 4995039 | Circuit for transparent scan path testing of integrated circuit devices | Ichiro Tomioka, Takeshi Hashizume | 1991-02-19 |
| 4992845 | Semiconductor integrated circuit device having input/output buffer cells each comprising a plurality of transistor regions arranged in a single line | Takahiko Arakawa, Satoru Kishida, Toshiaki Hanibuchi, Ichiro Tomioka, Masahiro Ueda +1 more | 1991-02-12 |
| 4894564 | Programmable logic array with reduced product term line voltage swing to speed operation | Takashi Ohya, Takeshi Hashizume | 1990-01-16 |
| 4870345 | Semiconductor intergrated circuit device | Ichiro Tomioka, Satoru Kishida, Toshiaki Hanibuchi, Takahiko Arakawa | 1989-09-26 |
| 4864579 | Semiconductor integrated circuit device | Satoru Kishida, Ichiro Tomioka | 1989-09-05 |
| 4856002 | Semiconductor integrated circuit apparatus | Satoru Kishida, Toshiaki Hanibuchi, Ichiro Tomioka, Takahiko Arakawa | 1989-08-08 |
| 4780666 | Semiconductor integrated circuit device having rest function | Satoru Kishida, Toshiaki Hanibuchi, Ichiro Tomioka, Takahiko Arakawa | 1988-10-25 |