Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7180137 | Semiconductor device | Yasushi Hayakawa | 2007-02-20 |
| 7112989 | Transmission signal correction circuit | Takeshi Ooshita, Takuji Komeda | 2006-09-26 |
| 6282680 | Semiconductor device | Ryoichi Takagi | 2001-08-28 |
| 6275055 | Semiconductor integrated circuit | Masahiko Hyozo | 2001-08-14 |
| 6094069 | Semiconductor integrated circuit having controlled output resistance of an output buffer circuit | Mitsuo Magane, Masashi Ishii | 2000-07-25 |
| 5978419 | Transmitter and receiver circuits for high-speed parallel digital data transmission link | Daniel R. Cassiday, Soroush Shakib, Derek Tsai, Mistsuo Magane | 1999-11-02 |
| 5973509 | Output buffer circuit | Hideki Taniguchi | 1999-10-26 |
| 5828260 | Output buffer circuit | Hideki Taniguchi | 1998-10-27 |
| 5617045 | Input circuit for processing small amplitude input signals | — | 1997-04-01 |
| 5594369 | Open-drain fet output circuit | Harufusa Kondoh | 1997-01-14 |
| 5537059 | Output circuit of semiconductor integrated circuit device | — | 1996-07-16 |
| 5422592 | Input circuit of semiconductor integrated circuit device | — | 1995-06-06 |
| 5406215 | Open drain driver circuit which eliminates overshoot caused by parasitic capacitances | — | 1995-04-11 |
| 5278436 | Semiconductor integrated circuit device for forming logic circuit including resistance element connected to bipolar transistor with smaller occupied area | Masahiro Ueda | 1994-01-11 |
| 5173625 | Method and apparatus for conversion of signal level from ECL to TTL | Masahiro Ueda, Toshiaki Hanibuchi | 1992-12-22 |
| 4977337 | Bi-CMOS logic circuit | Shigeki Ohbayashi | 1990-12-11 |