Issued Patents All Time
Showing 1–25 of 66 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10262707 | Semiconductor memory device for stably reading and writing data | Koji Nii, Yasumasa Tsukamoto, Makoto Yabuuchi | 2019-04-16 |
| 9672900 | Semiconductor memory device for stably reading and writing data | Koji Nii, Yasumasa Tsukamoto, Makoto Yabuuchi | 2017-06-06 |
| 9299418 | Semiconductor memory device for stably reading and writing data | Koji Nii, Yasumasa Tsukamoto, Makoto Yabuuchi | 2016-03-29 |
| 8908419 | Semiconductor storage device and method of fabricating the same | Hidemoto Tomita, Yoshiyuki Ishigaki | 2014-12-09 |
| 8743645 | Semiconductor memory device for stably reading and writing data | Koji Nii, Yasumasa Tsukamoto, Makoto Yabuuchi | 2014-06-03 |
| 8422274 | Semiconductor storage device and method of fabricating the same | Hidemoto Tomita, Yoshiyuki Ishigaki | 2013-04-16 |
| 8395932 | Semiconductor storage device and method of fabricating the same | Hidemoto Tomita, Yoshiyuki Ishigaki | 2013-03-12 |
| 8098533 | Semiconductor memory device with adjustable selected word line potential under low voltage condition | Koji Nii, Yasumasa Tsukamoto, Makoto Yabuuchi | 2012-01-17 |
| 7589566 | Semiconductor device provided with antenna ratio countermeasure circuit | Hiroaki Suzuki, Koichiro Ishibashi, Hiroshi Makino | 2009-09-15 |
| 7570525 | Semiconductor memory device with adjustable selected work line potential under low voltage condition | Koji Nii, Yasumasa Tsukamoto, Makoto Yabuuchi | 2009-08-04 |
| 7505339 | Static semiconductor memory device allowing simultaneous writing of data into a plurality of memory cells | — | 2009-03-17 |
| 7076705 | Semiconductor integrated circuit having bonding optional function | — | 2006-07-11 |
| 7038925 | Static semiconductor memory device having T-type bit line structure | — | 2006-05-02 |
| 6976200 | Semiconductor integrated circuit having bonding optional function | — | 2005-12-13 |
| 6891743 | Semiconductor memory device having a capacitive plate to reduce soft errors | Yoshiyuki Ishigaki, Takahiro Yokoyama | 2005-05-10 |
| 6812574 | Semiconductor storage device and method of fabricating the same | Hidemoto Tomita, Yoshiyuki Ishigaki | 2004-11-02 |
| 6781869 | Semiconductor memory | Yoshiyuki Ishigaki, Takahiro Yokoyama | 2004-08-24 |
| 6741510 | Semiconductor memory device capable of performing burn-in test at high speed | Yoji Kashihara, Takahiro Yokoyama | 2004-05-25 |
| 6714478 | Semiconductor memory device having divided word line structure | Hidemoto Tomita, Motomu Ukita, Yoji Kashihara | 2004-03-30 |
| 6710634 | Power on reset circuit | Tadayuki Shimizu | 2004-03-23 |
| 6711070 | Semiconductor memory device operating in synchronization with clock signal | Yoji Kashihara | 2004-03-23 |
| 6704238 | Semiconductor memory device including data bus pairs respectively dedicated to data writing and data reading | Takashi Izutsu, Yoji Kashihara | 2004-03-09 |
| 6597041 | Semiconductor static random access memory device | — | 2003-07-22 |
| 6574159 | Semiconductor memory device and testing method therefor | Yoji Kashihara, Motomu Ukita | 2003-06-03 |
| 6559489 | Semiconductor device and method of manufacturing the same | Ryuichi Kosugi | 2003-05-06 |