Issued Patents All Time
Showing 26–50 of 66 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6556058 | Power on reset circuit | Tadayuki Shimizu | 2003-04-29 |
| 6535441 | Static semiconductor memory device capable of accurately detecting failure in standby mode | Minoru Senda | 2003-03-18 |
| 6521951 | Semiconductor circuit device with improved surge resistance | Hirotashi Sato | 2003-02-18 |
| 6479860 | Semiconductor memory device | — | 2002-11-12 |
| 6469552 | Power on reset circuit | Tadayuki Shimizu | 2002-10-22 |
| 6452269 | Semiconductor integrated circuit having power supply pin | — | 2002-09-17 |
| 6388857 | Semiconductor circuit device with improved surge resistance | Hirotoshi Sato | 2002-05-14 |
| 6373760 | Static type semiconductor memory device adopting a redundancy system | — | 2002-04-16 |
| 6320802 | Program circuit suppressing stand-by current and permitting highly reliable operation, and semiconductor memory device using the program circuit | — | 2001-11-20 |
| 6314037 | Semiconductor integrated circuit device using BiCMOS technology | Toru Shiomi | 2001-11-06 |
| 6301678 | Test circuit for reducing test time in semiconductor memory device having multiple data input/output terminals | Hirotoshi Sato, Tomohisa Wada | 2001-10-09 |
| 6295222 | Semiconductor memory device with two layers of bit lines | Yoshiko Higashide | 2001-09-25 |
| 6229365 | Semiconductor integrated circuit device operating stably at a plurality of power supply voltage levels | Masayuki Iketani | 2001-05-08 |
| 6141269 | Semiconductor integrated circuit device using BiCMOS technology | Toru Shiomi | 2000-10-31 |
| 6088820 | Static semiconductor memory device having test mode | Ken Jyo | 2000-07-11 |
| 5991223 | Synchronous semiconductor memory device operable in a burst mode | Kunihiko Kozaru | 1999-11-23 |
| 5875089 | Input protection circuit device | Yoshiko Higashide | 1999-02-23 |
| 5781468 | Semiconductor memory device comprising two kinds of memory cells operating in different access speeds and methods of operating and manufacturing the same | Ryuichi Matsuo, Tomohisa Wada, Kazutoshi Hirayama | 1998-07-14 |
| 5764573 | Semiconductor device capable of externally and readily identifying set bonding optional function and method of identifying internal function of semiconductor device | Masayuki Iketani | 1998-06-09 |
| 5734281 | Semiconductor integrated circuit for outputting an intermediate potential | Chikayoshi Morishima | 1998-03-31 |
| 5708802 | Semiconductor memory device | Chikayoshi Morishima | 1998-01-13 |
| 5703510 | Power on reset circuit for generating reset signal at power on | Masayuki Iketani | 1997-12-30 |
| 5684750 | Semiconductor memory device with a sense amplifier including two types of amplifiers | Setsu Kondoh | 1997-11-04 |
| 5666324 | Clock synchronous semiconductor memory device having current consumption reduced | Ryuichi Kosugi | 1997-09-09 |
| 5663905 | Semiconductor memory device comprising two kinds of memory cells operating in different access speeds and methods of operating and manufacturing the same | Ryuichi Matsuo, Tomohisa Wada, Kazutoshi Hirayama | 1997-09-02 |