Issued Patents All Time
Showing 101–103 of 103 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 4953164 | Cache memory system having error correcting circuit | Kazuyasu Fujishima, Yoshio Matsuda | 1990-08-28 |
| 4926385 | Semiconductor memory device with cache memory addressable by block within each column | Kazuyasu Fujishima, Hideto Hidaka, Yoshio Matsuda | 1990-05-15 |
| 4914632 | Semiconductor devices having redundancy circuitry and operating method therefor | Kazuyasu Fujishima, Yoshio Matsuda | 1990-04-03 |