Issued Patents All Time
Showing 51–62 of 62 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10140252 | Hardware node with matrix-vector multiply tiles for neural network processing | Jeremy Fowers | 2018-11-27 |
| 10129153 | In-line network accelerator | Adrian M. Caulfield, Doug Burger, Derek Chiou | 2018-11-13 |
| 10027543 | Reconfiguring an acceleration component among interconnected acceleration components | Sitaram V. Lanka, Adrian M. Caulfield, Andrew R. Putnam, Douglas C. Burger, Derek Chiou | 2018-07-17 |
| 9983938 | Locally restoring functionality at acceleration components | Stephen F. Heil, Sitaram V. Lanka, Adrian M. Caulfield, Andrew R. Putnam, Douglas C. Burger +1 more | 2018-05-29 |
| 9888095 | Lightweight transport protocol | Adrian M. Caulfield, Doug Burger, Derek Chiou | 2018-02-06 |
| 9847980 | Protecting communications with hardware accelerators for increased workflow security | Douglas C. Burger, Kenneth Eguro | 2017-12-19 |
| 9760159 | Dynamic power routing to hardware accelerators | Andrew R. Putnam, Douglas C. Burger, Stephen F. Heil, Adrian M. Caulfield | 2017-09-12 |
| 9674090 | In-line network accelerator | Adrian M. Caulfield, Doug Burger, Derek Chiou | 2017-06-06 |
| 9652327 | Restoring service acceleration | Stephen F. Heil, Sitaram V. Lanka, Adrian M. Caulfield, Andrew R. Putnam, Douglas C. Burger +1 more | 2017-05-16 |
| 9606836 | Independently networkable hardware accelerators for increased workflow optimization | Douglas C. Burger, Adrian M. Caulfield, Andrew R. Putnam | 2017-03-28 |
| 9317482 | Universal FPGA/ASIC matrix-vector multiplication architecture | John D. Davis, Srinidhi Kestur | 2016-04-19 |
| 5689155 | Electronic stabilizer having a variable frequency soft start circuit | Charles Chang | 1997-11-18 |