CB

Cyrus Bamji

Microsoft: 51 patents #319 of 40,388Top 1%
CA Canesta: 23 patents #1 of 22Top 5%
CS Cadence Design Systems: 12 patents #85 of 2,263Top 4%
WL Waikatolink Limited: 1 patents #4 of 18Top 25%
📍 Fremont, CA: #94 of 9,298 inventorsTop 2%
🗺 California: #2,909 of 386,348 inventorsTop 1%
Overall (All Time): #19,163 of 4,157,543Top 1%
87
Patents All Time

Issued Patents All Time

Showing 76–87 of 87 patents

Patent #TitleCo-InventorsDate
6522395 Noise reduction techniques suitable for three-dimensional information acquirable with CMOS-compatible image sensor ICS Edoardo Charbon, Shiraz Shivji 2003-02-18
6515740 Methods for CMOS-compatible three-dimensional image sensing using quantum efficiency modulation Edoardo Charbon 2003-02-04
6512838 Methods for enhancing performance and data acquired from three-dimensional image systems Abbas Rafii, Cheng-Feng Sze, Iihami Torunoglu 2003-01-28
6457159 Functional timing analysis for characterization of virtual component blocks Hakan Yalcin, Robert J. Palmero, Karem A. Sakallah, Mohammad Mortazavi 2002-09-24
6323942 CMOS-compatible three-dimensional image sensor IC 2001-11-27
5729466 Optimization multiple performance criteria by simulating the behavior of a constraint graph expanded by subgraphs derived from PWL convex cost functions 1998-03-17
5663891 Optimization of multiple performance criteria of integrated circuits by expanding a constraint graph with subgraphs derived from multiple PWL convex cost functions Enrico Malavasi 1997-09-02
5604680 Virtual interface representation of hierarchical symbolic layouts Ravi Varadarajan 1997-02-18
5581474 Identifying overconstraints using port abstraction graphs Ravi Varadarajan 1996-12-03
5568396 Identifying overconstraints using port abstraction graphs Ravi Varadarajan 1996-10-22
5381343 Hier archical pitchmaking compaction method and system for integrated circuit design Ravi Varadarajan 1995-01-10
5281558 Cloning method and system for hierarchical compaction Ravi Varadarajan 1994-01-25