ZZ

Zhenming Zhou

Micron: 119 patents #115 of 6,345Top 2%
ST Sandisk Technologies: 19 patents #148 of 2,224Top 7%
📍 San Jose, CA: #125 of 32,062 inventorsTop 1%
🗺 California: #1,165 of 386,348 inventorsTop 1%
Overall (All Time): #7,295 of 4,157,543Top 1%
138
Patents All Time

Issued Patents All Time

Showing 101–125 of 138 patents

Patent #TitleCo-InventorsDate
11500588 Adjusting read voltage levels based on a temperature-dependent slope of the threshold voltage drift of a memory sub-system Murong Lang 2022-11-15
11495316 Optimized seasoning trim values based on form factors in memory sub-system manufacturing Tingjun Xie, Murong Lang 2022-11-08
11467900 Adjusting read throughput level for a data recovery operation Jian Huang, Jiangli Zhu 2022-10-11
11449377 Adaptive frequency control for high-speed memory devices Jian Huang, Zhongguang Xu, Murong Lang 2022-09-20
11404131 Decision for executing full-memory refresh during memory sub-system power-on stage Tingjun Xie, Zhenlei Shen 2022-08-02
11403216 Scaling factors for media management operations at a memory device Mikai Chen, Zhenlei Shen, Murong Lang 2022-08-02
11307799 Managing threshold voltage drift based on operating characteristics of a memory sub-system Murong Lang 2022-04-19
11244740 Adapting an error recovery process in a memory sub-system Zhongguang Xu, Murong Lang 2022-02-08
11238950 Reliability health prediction by high-stress seasoning of memory devices Zhongguang Xu, Murong Lang 2022-02-01
11231870 Memory sub-system retirement determination Mikai Chen, Murong Lang 2022-01-25
11222710 Memory dice arrangement based on signal distribution Mikai Chen, Zhenlei Shen, Murong Lang 2022-01-11
11183267 Recovery management of retired super management units Jian Huang 2021-11-23
11127481 Managing execution of scrub operations in a memory sub-system Murong Lang, Zhongguang Xu 2021-09-21
11107543 Adjustment of read and write voltages using a space between threshold voltage distributions Murong Lang 2021-08-31
11101001 Non-volatile memory with multi-plane mixed sub-block programming Henry Chin 2021-08-24
11087849 Non-volatile memory with bit line controlled multi-plane mixed sub-block programming Henry Chin 2021-08-10
10971228 Adaptive application of voltage pulses to stabilize memory cell voltage levels Murong Lang, Tingjun Xie 2021-04-06
10950315 Preread and read threshold voltage optimization Seungjune Jeon, Zhenlei Shen 2021-03-16
10916292 Performing a refresh operation based on system characteristics Tingjun Xie 2021-02-09
10910069 Manage source line bias to account for non-uniform resistance of memory cell source lines Murong Lang, Deepanshu Dutta 2021-02-02
10908845 Managing threshold voltage drift based on a temperature-dependent slope of the threshold voltage drift of a memory sub-system Murong Lang 2021-02-02
10825513 Parasitic noise control during sense operations Dengtao Zhao, Deepanshu Dutta 2020-11-03
10790036 Adjustment of read and write voltages using a space between threshold voltage distributions Murong Lang 2020-09-29
10726925 Manage source line bias to account for non-uniform resistance of memory cell source lines Murong Lang, Deepanshu Dutta 2020-07-28
10636498 Managing bit-line settling time in non-volatile memory Yu-Chung Lien, Xiang Yang, Deepanshu Dutta 2020-04-28