ZZ

Zhenming Zhou

Micron: 119 patents #115 of 6,345Top 2%
ST Sandisk Technologies: 19 patents #148 of 2,224Top 7%
📍 San Jose, CA: #125 of 32,062 inventorsTop 1%
🗺 California: #1,165 of 386,348 inventorsTop 1%
Overall (All Time): #7,295 of 4,157,543Top 1%
138
Patents All Time

Issued Patents All Time

Showing 51–75 of 138 patents

Patent #TitleCo-InventorsDate
12013792 Error avoidance for partially programmed blocks of a memory device Li-Te Chang, Murong Lang 2024-06-18
12009027 Refresh of neighboring memory cells based on read status Li-Te Chang, Murong Lang 2024-06-11
11994945 Managing write disturb for units of memory in a memory sub-system Tingjun Xie, Charles See Yeung Kwong 2024-05-28
11977480 Scaling factors for media management operations at a memory device Mikai Chen, Zhenlei Shen, Murong Lang 2024-05-07
11972122 Memory read operation using a voltage pattern based on a read command type Yu-Chung Lien, Ching-Huang Lu 2024-04-30
11966591 Apparatus with read level management and methods for operating the same Murong Lang, Tingjun Xie, Fangfang Zhu, Jiangli Zhu 2024-04-23
11960745 Empty page scan operations adjustment Peng Zhang, Murong Lang, Christina Papagianni 2024-04-16
11947831 Adaptive enhanced corrective read based on write and read temperature Murong Lang, Ching-Huang Lu, Nagendra Prasad Ganesh Rao 2024-04-02
11947421 Decreasing a quantity of queues to adjust a read throughput level for a data recovery operation Jian Huang, Jiangli Zhu 2024-04-02
11929138 Recovery management of retired super management units Jian Huang 2024-03-12
11929127 Selective data pattern write scrub for a memory system Zhongguang Xu, Murong Lang 2024-03-12
11923001 Managing the programming of an open translation unit Murong Lang, Jian Huang, Tingjun Xie, Jiangli Zhu, Nagendra Prasad Ganesh Rao +1 more 2024-03-05
11914889 Managing an adjustable write-to-read delay based on cycle counts in a memory sub-system Murong Lang, Tingjun Xie, Wei Wang, Frederick Adi, Jiangli Zhu 2024-02-27
11894090 Selective power-on scrub of memory units Zhenlei Shen, Tingjun Xie 2024-02-06
11881284 Open translation unit management using an adaptive read threshold Murong Lang, Jian Huang, Zhongguang Xu, Jiangli Zhu 2024-01-23
11861178 Managing a hybrid error recovery process in a memory sub-system Zhongguang Xu, Jian Huang, Tingjun Xie, Murong Lang 2024-01-02
11853617 Managing write disturb based on identification of frequently-written memory units Tingjun Xie, Charles See Yeung Kwong 2023-12-26
11790998 Eliminating write disturb for system metadata in a memory sub-system Tingjun Xie, Zhenlei Shen, Charles See Yeung Kwong 2023-10-17
11775388 Defect detection in memory based on active monitoring of read operations Zhenlei Shen, Tingjun Xie, Frederick Adi, Wei Wang 2023-10-03
11776611 Managing write disturb for units of a memory device using weighted write disturb counts Mikai Chen, Murong Lang, Zhenlei Shen 2023-10-03
11768615 Temperature-based media management for memory components Ying Yu Tai 2023-09-26
11763896 Preread and read threshold voltage optimization Seungjune Jeon, Zhenlei Shen 2023-09-19
11762589 Dynamic read-level thresholds in memory systems Zhongguang Xu, Tingjun Xie, Murong Lang 2023-09-19
11763914 Adapting an error recovery process in a memory sub-system Zhongguang Xu, Murong Lang 2023-09-19
11756635 Decision for executing full-memory refresh during memory sub-system power-on stage Tingjun Xie, Zhenlei Shen 2023-09-12